No edit summary |
No edit summary |
||
Line 10: | Line 10: | ||
Hardware: an Altera cyclone FPGA development kit such as Terasic de0 nano (http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=139&No=593) or Bemicro CV ( http://parts.arrow.com/item/detail/arrow-development-tools/bemicrocv#ypJJ). Other suggestions welcome. | Hardware: an Altera cyclone FPGA development kit such as Terasic de0 nano (http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=139&No=593) or Bemicro CV ( http://parts.arrow.com/item/detail/arrow-development-tools/bemicrocv#ypJJ). Other suggestions welcome. | ||
Topics include | == Topics include == | ||
* Recap of basic logic design principles | |||
* FPGA hardware architecture, logic blocks, look-up tables, memory and multipliers | |||
* FPGA resource constraints: routing, logic blocks, IO limitations | |||
* Hard & Soft IP and licensing | |||
* Installing Quartus on a linux machine | |||
* Design project workflow | |||
* Basic (V)HDL | |||
* Nios IIe system builder. | |||
* Altera vs Xilinx vs Lattice vs ..... | |||
Requirements | == Requirements == | ||
Some understanding of logic circuitry design principles, a supported (Altera) FPGA development kit and access to a (linux) computer for running the Quartus software | |||
Venue | == Costs == | ||
Free as in free beer and free speech, but limited to the consumables that you bring yourself ;-) | |||
== Venue == | |||
* Diedenoort, Wageningen | |||
== Extra == | |||
Date and supported development kits are tentative, and will be fixed at least 8 weeks before workshop. If necessary we can organize a group-buy. | Date and supported development kits are tentative, and will be fixed at least 8 weeks before workshop. If necessary we can organize a group-buy. | ||
If you're interested in joining please PM me at the0 @ #nurds (irc.oftc.net) OR reply to my mail to the mailing list. It would be useful to know how much you know about digital circuit design as well | |||
If you're interested please PM me at the0 @ #nurds (irc.oftc.net) OR reply to my mail to the mailing list. It would be useful to know how much you know about digital circuit design as well |
Revision as of 19:33, 2 September 2014
FPGA workshop | |
---|---|
Name | hands-on FPGA |
Date | 2014/11/30 |
DateEnd | |
Location | @space |
Contact | theo |
Attendees | User:buzz, Dennis |
A two-day hands-on workshop FPGA programming.
Hardware: an Altera cyclone FPGA development kit such as Terasic de0 nano (http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=139&No=593) or Bemicro CV ( http://parts.arrow.com/item/detail/arrow-development-tools/bemicrocv#ypJJ). Other suggestions welcome.
Topics include
- Recap of basic logic design principles
- FPGA hardware architecture, logic blocks, look-up tables, memory and multipliers
- FPGA resource constraints: routing, logic blocks, IO limitations
- Hard & Soft IP and licensing
- Installing Quartus on a linux machine
- Design project workflow
- Basic (V)HDL
- Nios IIe system builder.
- Altera vs Xilinx vs Lattice vs .....
Requirements
Some understanding of logic circuitry design principles, a supported (Altera) FPGA development kit and access to a (linux) computer for running the Quartus software
Costs
Free as in free beer and free speech, but limited to the consumables that you bring yourself ;-)
Venue
- Diedenoort, Wageningen
Extra
Date and supported development kits are tentative, and will be fixed at least 8 weeks before workshop. If necessary we can organize a group-buy.
If you're interested in joining please PM me at the0 @ #nurds (irc.oftc.net) OR reply to my mail to the mailing list. It would be useful to know how much you know about digital circuit design as well